High impedance transistor circuits



June 21, 1960 R. A. HANEL ETAL 2,942,200

HIGH IMPEDANCE TRANSISTOR CIRCUITS Original Filed May '7, 1956 FIG.

INVENTORS, RUDOLF A. STAMPFL a RUDOLF A. HA/VEL.

common elements appear.

HIGH IMPEDANCE TRANSISTOR CIRCUITS Rudolf A. Hanel, Eatontown, andRudolf A. Stampfl, Interlaken, N.J., assignors to the United States ofAmerica as represented by the Secretary of the Army Original applicationMay 7, 1956,. Ser. No. 583,341,

now Patent No. 2,881,269, dated Apr. 7, 1959. Divided and thisapplication Feb. 26, 1959, Ser. No.

4 Claims. (Cl. 330-18) (Granted under Title 35, US. Code (1952), see.266) The invention described herein may be manufactured and used by orfor the Government for governmental purposes, without the payment of anyroyalty thereon.

This application is a division of application Serial No. 583,341, filedMay 7,1956, now Patent No. 2,881,269. i .This invention relates toelectronic devices and particularly to those in which the activeelements are transistors.

An object of the invention is to increase theinput impedance obtainablewith transistor amplifiers.

In accordance with the invention a common collector transistor inputstage is provided with a feedback circuit whereby the collector voltageis made to follow the input signal impressed on the base. This preventsthe normal base-collector signal voltage fields from forming. In theabsence of the fields no signal current flows, a condition which ifperfect provides infinite collector impedance.

-And collector impedance, it has been observed, is the principallimitation on extending the input impedance of the common collectoramplifier. The expression common collector amplifier or stage, as usedin the specification and claims, is deemed to include amplifiers whichinclude a semiconductor device having at least three elements whichfunction as base, emitter, and collector elements,

, circuit shown in Figure 1;

Figure 3 is a graph illustrated of certain properties of the invention;and

Figures 4 and 5 are schematic circuit diagrams of othe embodiments ofthe invention.

The numbering system employed is common to all three diagrams ofembodiments of the invention insofar as In Figure 1, NPN transistors 10and 12 are connected in common collector fashion with the emitter oftransistor '10 directly connected to the base of transistor 12.Collector load resistor 14 is connected between the positive .terminalof collector bias source 16 and the collector of alternating current(A.C.) feedback path andcoupling element 24, in the form of a battery orequivalent D.C. source, providing a DC. feedback path, are connected be-;tween the emitter of transistor 12 and the collector of transistor 10.For A.C. amplification only, potential -source 24 is notnecessary.Source 24 may be used with- U Patented June 21, 1960 ice age andpolarity of the potential source 24 should be the same as the observedstatic voltage difierence and polarity between collector of transistor10 and the emitter of transistor 12 with source 24 disconnected.

In operation, when a positive voltage is applied to the base oftransistor 10 the in-phase emitter voltage rises with it and normallythe out-of-phase collector voltage would drop due to the increase involtage drop across the collector resistor 14. However in accordancewith the invention the emitter output voltage fromtransistor 10 is fedto the base of transistor 12 and the emitter output of this transistoris coupled in phase through feedback capacitor 22 and potential source24 back to the collector of transistor 10, and thus the out-of-phasevoltage change tendency on the collector is overcome and the collectorvoltage is caused to substantially follow the input base voltage. Aspreviously stated it is this result which produces the higher impedanceinput.

The effectiveness of the invention may perhaps be best illustrated byanalysis of its equivalent circuits shown in Figures 2a, 2b and 2c, inwhich:

I=input current I =current through the first path in Figure 2c 1=current through the second path in Figure 2c E=input voltage r =baseresistance of transistor 10 r =emitter resistance of transistor 10 r=collector resistance of transistor 10 a==current amplification factorof transistor 10 R =collector load resistance of transistor 10 R.=emitter load resistance of transistor 12 I =base current throughtransistor 12 Z =impedance of the feedback coupling circuit Otherprimedsymbols refer to the elements of transistor 12.1 a

The circuit shown as Figure 2a contains a complete equivalent circuit ofFigure 1. It is assumed that:

Eliminating r r r' r,, and Z and redesignating R R' /R ,+R as R theequivalent circuit may be rewritten as in Figure 2b.

Since the base current of the, second transistor is the current outputof the first transistor, following the formula for current gain in acommon collector stage, where the output load is small, I (1-a) may besubstituted for the base current I,,. In addition the terms (l-a) and mt, which are eifectively shorted out, may be omitted. Again redrawing,we have the final equivalent circuit shown in Figure 2c.

, solved and the equation for input impedance, E/I, written.

n onwajarwtue a.

From it, the following equations can be sequal approximately 10,000.

Values for the first term in Equation 6 for values of a, assuming a=a,may be read from the graph in Figure 3. For example with a value of .99for a, the first termwill The second term ;is R shunted with r' ('l-a),and with a readily obtainable value of 50,000 for each of theseresistances the term value would be 25,000. Multiplied we obtain aninput impedance of 250 megohms.

The above theoretical analysishas been generally substantiated inpractice as input impedances of :circuits built in accordance with ithave been measured at approxi- -.-mately 200 megohms.

The embodiment of theinvention shown in Figure4 is similar-and'fuuctionsin substantially the .same manner as the one just described. his howeverdesigned *withoutseparate collector and emitter "load resistors and,biflSfSOllfCfiS. In Figure l, the emitter of transistor IO'flS directlyconnected to the baseof transistor 12. --InFigure 4, the'emitter oftransistor 26 is indirectly connected ,-to the base of transistor 28throughcapacitor -22:and'D.C. source24. In Figure l the emitter of,transistor :12 -is indirectlyconnected to the collector of transistor 10through capacitor 22 and DC. source 2'4. In Figure 4 the emitter I oftransistor '28 isrdirectly connected to the collector of transistor 26..As shown in Figure .A the transistors 26 and 28 are of the PNPitype.

In Figure 5 the basic circuit of Figure V1 .is modified in that thefeedback and output voltages are transferred by transformer 30. Thetransformer .has three ,windings, viz., a collector winding connected totransistor 10, an emitter winding connected to transistorlZ, and anoutput winding. Appropriate feedback may be .obtained with a ratio ofone to one between collectorrand emitter windings. In all of thecircuits shown either NPN or PNP type transistors may beused. Ifdesired, one NPN type and one -PNP type may be used in combination. Itis of course necessary-to-reverse the .biasing potentials from thoseshown where substitutionsiare made. I

While there has 'been'des'cribed what is at present considered apreferred embodiment of the invention, it Will be obvious tothose'skilled in the art that various changes and modifications may'bemade therein without departing from the invention, and it is aimed inthebppended :claims to cover all suchchanges and modifications as fallwithin the truespirit andscope of "the invention.

What is claimed is:

1. 'An amplifying system comprising first and second transistors, eachcomprising base, emitter :and collector elements, the emitter element ofsaid firsttransistor being connected to the base element of said secondtransisto'r, first and second resistors, one end of said-first resistorbeing connected to the collector "element of said :first transistor, oneend of said second resistor being connected to the said emitter elementof said second transistor, first and second 'D. C. bias sources, oneterminal of said first bias source being connected 'to the other end ofsaid'first resistor, one terminal of said second bias source beingconnected""to the other end of said second resistor, the oppositeterminal of said first bias source, the opposite terminalof said secondbias source and the collector element of said second tran- 'sistor allbeing connected to a common terminal, said bias sources being poled toapply normal collector operating biases on the collector elements ofsaid tranisistors, signal coupling means'being'connected between thecollector element of said first transistor and the emitter element ofsaid second transistor for impressing the voltagefrom saidremitter ofsaid second transistor upon the collector of said first transistor, anda pair of input terminals being connected between the base :element ofSaid first. transistor andrsaid common: terminal.

2. An amplifying system comprising first and second iaaaaeoo NPNtransistors, each comprising base, emitter and collector elements, theemitter element of said first transistor being connected to the baseelement of said second transistor, first and second resistors, one endof said first resistor being connected to the collector element ofsaid-first transistor, one end of said second resistor being connectedto the said wemitter element of said second transistor, first and secondDC. bias sources, the positive terminal of said first biassource'beingconnected to the other end of said first resistor, the nega- 'tiveterminal of-said .second bias source being connected to the other end ofsaid second resistor, thepppositeterminal of said first bias source, theopposite terminal of said second bias source and the collector elementof said second transistor all being connected to acommon terminal, acapacitor and a DC source being connected in parallel between thecollector element of said first transistor and the emitter element ofsaid second transistor, said DC. bias source exhibiting the samepotential as the static potential across said capacitor without saidD.C. bias source, a pair of input terminals being connected between thebase element of said first transistor and the said common terminal, and-a pair of output terminals being connected between the emitter ele-'ment of thesaid-second transistor and said common terminal.

3. An amplifying-system comprising a first and second transistor, eachcomprising base, emitter and collector elements, the emitter element ofsaid first transistor being connected to the base element of said secondtransistor, a transformer comprising a first, and

second windings, a first and second biasing sources, one end of saidfirst transformer winding being connected to the collector element ofsaid first transistor and the other end being connected to a firstterminal of said first biasing source, one end of said secondtransformer Winding being connected to the emitter element'of saidsecond transistor and the otherend being connected to a first terminalof said second biasing source,.conn ections to said windings beingarranged to cause phase opposition between signal voltages appearingacrosssaid windings, the opposite terminal of said first biasing sourceand the opposite terminal of said second biasing source being connectedto a common terminal, the collectorof said second transistor beingconnected tosaidcomrrion terminal, said first biasing source being poledjto apply normal operating bias to ,said collector of said firsttransistor and said second biasing source being poled to apply normaloperating bias to said emitter of sai'd second transistor, a pair ofinput terminals being, con

nected between the base element of said first transistor 'sistor beingdirectly connected to the base element of said second transistor, atransformercomprising a first,

second, and third windings, a first and second..biasing sources, one endof said first transformer winding being connected to the collectorelement of said first transistor and the other end being connected tothe positive terminal of saidfirst biasing source, one end-"of saidsecond transformer'windingbeing connected to -the emitter elements ofsaid-second transistor and the otherand being connected to the negative,terminal of saidsecond biasing source, connections to said firstandsecondwind ings being arranged to provide phase oppositionibetween.thevoltages impressed across said first and second-windings, outputterminals being:connected t o athe ends-rof saidthird transformer.winding, thenegative terminal of said. first biasing source and the'BPOSifiVEJ'lZCIHliHfl-Qid a n nAmr ms nu. n.-

said second biasing source being connected to a common terminal, thecollector of said second transistor being connected to said commonterminal, and a pair of input terminals being connected to the baseelement of the base of said first transistor and said common terminal.

References Cited in the file of this patent UNITED STATES PATENTS

